In a semiconductor device manufacturing process using a photolithography technique, for example, a resist coating process of coating a resist onto a semiconductor wafer (hereinafter referred to simply as “wafer”) to form a resist film, an exposure process of exposing a predetermined pattern on the resist film, and a developing process of developing the exposed resist film are performed in order so that a resist pattern is formed on the wafer.
The dimension (line width) of the resist pattern is determined by an exposure amount and a focus value set in an exposure apparatus which is configured to perform the exposure process. The exposure amount and the focus value are set based on a dimension of an intended resist pattern. The focus value corresponds to a distance between an objective lens installed in the exposure apparatus and the wafer. Since the exposure amount and the focus value may change with time, the exposure amount and the focus value are set to prevent changes in the dimension of the resist pattern even if the exposure amount and the focus value change. Specifically, the exposure amount and the focus value are set to have a wider margin.
A variation in an output from a light source or lens distortions caused by environmental factors such as a temperature and humidity may cause the focus value and the exposure amount to be changed as described above, which causes an offset between a set value and an actual value with respect to time. For this reason, an operation of periodically checking the relationship of the exposure amount and the focus value with a dimension of each pattern is performed. If desired, a correction is performed on the exposure amount and the focus value. In the checking operation, a wafer called an FEM (Focus Exposure Matrix) wafer is formed and used. Details of the FEM wafer will be described in embodiments. The FEM wafer is formed by changing the focus value and the exposure amount with respect to each shot (one exposure) on the wafer with a resist film formed thereon, performing a sequence of subsequent exposure and developing processes, and forming a pattern on a plurality of exposure sectors of the wafer, respectively. A line width of the resist pattern formed on each of the exposure sectors is measured using an optical CD (Critical Dimension) measuring unit or an equipment called a critical dimension SEM (Scanning Electron Microscope) configured to measure a dimension of a pattern.
However, measuring the dimension of the pattern at each of the exposure sectors requires a long period of time, which leads to spending a lot of time in setting of the exposure apparatus, thereby making it difficult to increase production efficiency of the exposure apparatus. Conventionally, there is a technology in which the FEM wafer is formed to provide a simulation model which is used in manufacturing a photo mask of the exposure apparatus, and measures a line width of the pattern. Unfortunately, this technology fails to address the above mentioned problems.